Chip lithography: High-NA EUV in production for the first time

ASML and Intel have announced the first industrial deployment of High-NA EUV lithography systems, marking a key milestone in semiconductor manufacturing. The technology, which uses larger optics to capture more light and improve resolution, enables chip structures to shrink from 13.5 nanometers to 9 nanometers. This advancement comes as part of Intel’s ongoing efforts to enhance its manufacturing capabilities through advanced photolithography techniques. The new system, known as the Twinscan Exe:5200B, is being used by Intel Foundry to expose certain layers of some Core Ultra-300 processors, code-named Panther Lake. The company has requalified its latest manufacturing process, 18A, with High-NA EUV. However, specific models that will benefit from this new technique remain undisclosed. The system operates within Intel's U.S. semiconductor facility in Hillsboro, Oregon, which primarily serves as a research site and handles only a small portion of the overall production. This initial deployment is viewed as a valuable step for both companies. ASML emphasized that the dual qualification of the research phase provides critical data to refine system configuration, operational duration, and integration into mass production. The goal is to lay the groundwork for broader implementation, ensuring the full potential of the technology is realized. Intel Foundry expressed satisfaction with the first practical application of High-NA EUV, highlighting its significance in advancing their manufacturing processes. While Intel moves forward with a faster transition to High-NA EUV, industry leader TSMC appears to be proceeding more cautiously. The high cost of High-NA EUV systems, approximately 350 million euros per unit, doubles the price compared to existing Low-NA systems. Additionally, operating these advanced machines requires higher expenses. TSMC’s senior vice president, Kevin Zhang, has repeatedly expressed surprise at the results achievable with multiple exposures using Low-NA EUV. As a result, TSMC plans to continue using Low-NA EUV until at least the A12 fabrication process in 2029. Intel’s strategy reflects a shift toward greater reliance on High-NA EUV for future generations. With the upcoming 14A manufacturing process set to begin preparations by 2027, the company aims to leverage the benefits of High-NA EUV more extensively. This includes reducing the number of exposure steps required for the finest structures, thereby improving efficiency and yield. While the current production of compute dies for Panther Lake still relies largely on older EUV systems, the introduction of High-NA EUV marks a clear direction for Intel’s long-term manufacturing roadmap. The deployment of High-NA EUV represents a pivotal moment in semiconductor technology, offering the potential to significantly enhance performance and reduce costs over time. As manufacturers like Intel push ahead with this innovation, the broader implications for the industry, and the competitive landscape, will become increasingly evident. For now, the focus remains on refining the technology and scaling its application across more products and processes.